Role Overview
We are seeking a motivated and detail-oriented student to join our Design-for-Test (DFT) team as an ATPG (Automatic Test Pattern Generation) Engineer, offering hands-on experience in the development and implementation of test methodologies for complex SoC designs.
About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.