Intern at Globalfoundries

Perform circuit and logic design verification using SPICE and Verilog simulation.

Support verification of Foundation IP, including standard-cell libraries, memories, block-level IP, and chip-level integration.

Use AI-assisted methods and engineering data to support performance prediction for Foundation IP.

Contribute to formal verification activities and analyze verification results.

Assist with post-silicon analysis and silicon debug for applicable Foundation IP.

Develop scripts and use CAD tools to automate VLSI design, verification, analysis, and reporting tasks.

Document methods, results, issues, and recommendations, and communicate findings to the engineering team.

Globalfoundries